CY7C2561KV18 architecture equivalent, 72-mbit qdr-ii sram 4-word burst architecture.
* Configurations With Read Cycle Latency of 2.5 cycles: CY7C2561KV18 – 8M x 8 CY7C2576KV18 – 8M x 9 CY7C2563KV18 – 4M.
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